1. Field of the Invention
The present invention relates to a video display device, and more particularly, to a video display device capable of applying a display defect compensation circuit thereof, and reducing noise caused by overlap of different dither patterns.
2. Discussion of the Related Art
Recently, for video display devices, flat display devices, such as a liquid crystal display (LCD), a plasma display panel (PDP), and an organic light emitting diode (OLED) display device, have mainly been used.
Such a video display device is subjected to an inspection process at a manufacture stage in which the manufacture of a display panel has been completed, to inspect display defects possibly existing on the display panel. When the display panel is detected as having display defects, a repair process is carried out to repair defected portions of the display panel. However, there may be display defects that cannot be repaired by the repair process.
Display defects are mainly caused by a deviation in exposure light amount resulting from the overlapped light exposure in a multi-exposure operation of exposure equipment used in a thin film pattern formation process and the aberrations of multi-lenses used in the exposure equipment. The deviation in exposure light amount causes a variation in the width of thin film patterns, thereby resulting in a deviation in parasitic capacity among thin film transistors, a deviation in height among column spacers to maintain a desired cell gap, a deviation in parasitic capacity among signal lines, etc. Such deviations cause a brightness deviation, thereby resulting in display defects. Such display defects incurred by the exposure light amount deviation are displayed on the display panel in the form of vertical lines or horizontal lines in accordance with the scanning direction of the exposure equipment. However, it is difficult or impossible to eliminate such vertical or horizontal-line-shaped display defects, even through an improvement in process techniques.
Furthermore, display defects may be displayed in the form of point defects at defective pixels containing foreign matter. Although such defective pixels are subjected to a repair process, they may still have point defects in the repaired state. For example, when a defective pixel is repaired in the form of a dark pixel by a repair process, the dark pixel may be displayed in the form of a black point defect on a white image. Also, when a repair process is performed such that the pixel repaired in the form of a dark pixel is linked to a neighboring normal pixel, the linked pixels may be displayed as point defects due to a shortage of data charge amount because data supplied to the normal pixel must be distributed even to the repaired pixel, in order to charge the normal pixel.
In the case of a liquid crystal display device, which uses a backlight unit, there is a tendency to reduce the spacing of a liquid crystal panel from the backlight unit, in order to achieve slimness. However, the diffusion path of light emitted from the backlight unit is insufficient, so that display defects in the form of horizontal lines corresponding to respective positions of a plurality of lamps may be displayed.
Methods for compensating for display defects through a circuit have recently been proposed to solve the above-mentioned display defects. For example, Korean Patent Application No. 10-2006-0059285 filed in the name of the inventors discloses a method for compensating data to be displayed in defective display regions by modulating the data by use of compensation data. The display defect compensation circuit used in this method uses a frame rate control (FRC) dithering circuit for spatially and temporally distributing compensated data, in order to finely adjust the brightness difference between the boundaries of the defective display region and the normal display region.
Generally, video display devices are internally equipped with a dithering circuit using a general dithering method or an FRC dithering method, in order to finely adjust brightness differences between grayscales.
In a display defect compensation circuit of the related art applied to a video display device, which uses a dithering circuit as mentioned above, however, noise such as horizontal or vertical lines may be generated due to a collision between a first dither pattern of the display defect compensation circuit and a second dither pattern of the dithering circuit.
Furthermore, the display defect compensation circuit of the related art requires different compensation data pieces in accordance with different input sources or different models, respectively. For this reason, where all compensation data pieces according to various input sources and various models are stored, an excessive increase in memory capacity occurs. In this case, there are problems of an increase in the load of the compensation circuit and an increased task complexity.
On the other hand, where separate compensation circuits are used in accordance with different input sources or different models, it is necessary to develop timing controllers respectively equipped with compensation circuits according to the different input sources or different models. In this case, the manufacturing costs increase. Also, various types of printed circuit boards (PCBs) are required. For this reason, the management of the timing controller and PCB is complicated.